Low-dropout (LDO) voltage regulators are commonly used to provide power to low-voltage digital circuits. As it is shown in FIG. 1, a LDO voltage regulator 1 is generally made of an Operational Transconductance Amplifier (OTA) 12 and a ballast transistor 13. The structure is in a closed loop with a reference like a bandgap voltage 14.
But, as for every closed-loop structure, a stability problem can occur, generating oscillations at the output. The study of the phase behavior in open loop provides precious information to avoid these oscillations. To get a good stability, the main condition is to keep the phase margin, which is the phase value at 0 dB of the open loop transfer function, above 60°.
A prior art structure of a LDO voltage regulator is shown in FIG. 2, where the OTA 12 is implemented like an adaptative biasing CMOS amplifier. In this configuration, if a capacitance of compensation 121 (Cc) and a bias current 122 (I0) are not used, the output 15 (VOUT) is only stable for null load capacitance 16 (CL). But if this load capacitance 16 is null, the power supply rejection ratio (PSRR), which is the amount of noise from a power supply that an amplifier can reject, is very poor.
Otherwise, for non-zero load capacitance CL and null bias current I0, this type of circuit can be used with a capacitance of compensation Cc that ensures stability. But the drawback of such use of compensation capacitances is the non-linear interdependence of the two poles of the open loop transfer function versus current load IOUT. It can be noted that the frequency positions of these two poles affect directly the output stability. Consequently, the use of a capacitance of compensation Cc is useful only for very short output current range and deteriorates PSRR at specific frequencies.
Thus, this kind of configuration (FIG. 2) can difficulty reach stability, as it is commonly used with a high capacitance load CL (around 100 nF for a value of the load current IOUT around 1 mA).
An interesting solution to reach stability is disclosed in EP 1 111 493 wherein the OTA implemented is based on a Brokaw transconductance cell. This topology is quite different from the one implemented in the present invention, which implements an OTA as an adaptative biasing CMOS amplifier. Actually, a Brokaw transconductance cell merges the amplifier block with the bandgap voltage reference block. It achieves therefore lower quiescent current. The LDO voltage regulator reaches stability with the addition of a shunt capacitor at the counterphase input of the Brokaw transconductance cell and a base current compensation resistor. Unfortunately, this solution is limited to this topology. It also requires both a shunt capacitor and a compensation resistor to reach stability and can therefore definitely not be applied in an OTA as an adaptative biasing CMOS amplifier, used in the regulator according to the invention.
The present invention proposes a LDO voltage regulator arranged in such a way that these drawbacks can be avoided.